Internal RAM
The 8051 microcontroller has 128 bytes (00H to 7FH) of internal RAM. These 128 bytes are organized into three different areas
- Working Registers
- Bit addressable Registers
- General Purpose Registers
Working Registers
The first 32 bytes from addresses 00H to 1FH are organized as four banks as shown in the fig a
| Bank 0 | Register R0 to R7 | 00H to 07H |
| Bank 1 | Register R0 to R7 | 08H to 0FH |
| Bank 2 | Register R0 to R7 | 10H to 17H |
| Bank 2 | Register R0 to R7 | 18H to 1FH |
Out of these four banks, only one bank can be accessed at a time. Bits RS0 (Register Select 0) and RS1 (Register Select 1) in Program Status Word (PSW) determine which bank of register is currently in use.
When RESET pin is activated, RS0 and RS1 will be cleared (i.e, RS0=0 and RS1=0). So Bank0 is selected.
Bit Addressable Registers
The 8051 has a bit-addressable area of 16 bytes from byte addresses 20H to 2FH in internal RAM as shown in fig b, forming a total of 128 addressable bits (i.e., 16-byte location × 8 bits). Each bit can be accessed by its bit addresses from 00H to 7FH for the byte address location 20H to 2FH in RAM.
General Purpose Registers
The RAM area from 30H to 7FH location are used for general purpose data storage. It is addressable by bytes. The advantage of using this memory location is that their data access is faster compared to off-chip RAM.